On-surface atomic wires and logic gates : updated in 2016 Proceedings of the International Workshop on Atomic Wires, Krakow, September 2014 /

On-surface atomic wires and logic gates : updated in 2016 Proceedings of the International Workshop on Atomic Wires, Krakow, September 2014 /

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Bibliographic Details
Corporate Authors: International Workshop on Atomic Wires Kraków, Poland, International Workshop on Atomic Wires Kraków, Poland
Other Authors: Joachim, C. (Editor), Kolmer, Marek (Editor)
Format: Conference Proceeding Book
Language:English
Published: Cham, Switzerland : Springer, 2017
Series:Advances in atom and single molecule machines,
Subjects:
Nanowires > Congresses
Condensed matter physics (liquid state & solid state physics)
Electronic devices & materials
Materials science
Nanotechnology
Nanowires
TECHNOLOGY & ENGINEERING > Electronics > General
Electronic books
Conference papers and proceedings
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111 2 |a International Workshop on Atomic Wires  |d (2016 :  |c Kraków, Poland) 
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245 1 0 |a On-surface atomic wires and logic gates :  |b updated in 2016 Proceedings of the International Workshop on Atomic Wires, Krakow, September 2014 /  |c Marek Kolmer, Christian Joachim, editors 
264 1 |a Cham, Switzerland :  |b Springer,  |c 2017 
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505 0 |a Preface; Contents; About the Editors; 1 Surface Hydrogenation of the Si(100)-2×1 and Electronic Properties of Silicon Dangling Bonds on the Si(100):H Surfaces; Abstract; 1 Introduction; 2 Hydrogen Passivation Method of the Si(100)-2×1 Surface; 2.1 Wet Etching Methods; 2.2 In Situ Preparation; 2.3 Side Effects of the Hydrogenation: Monohydride and Dihydride Phases; 2.4 Atomic-Scale Control of the Hydrogenation; 3 Electronic Structure of a Silicon Dangling Bond and Dehydrogenated Dimer; 4 Conclusion; References; 2 Nanopackaging of Si(100)H Wafer for Atomic-Scale Investigations; Abstract 
505 8 |a 1 Introduction2 Nanopackaged Chip Fabrication; 2.1 Packaging Solution for Nanoscale Objects; 2.2 Nanopackaged Chip Fabrication; 2.2.1 Reconstruction of the Silicon Surface; 2.2.2 Bonding and Dicing; 3 The UHV Debonders; 4 UHV Surface Characterizations After the Opening; 5 LT-UHV-STM Atomic-Scale Images; 5.1 LT-UHV-STM-1P Probe Surface Studies; 5.2 LT-UHV-4 STM Surface Studies; 6 Summary and Conclusion; Acknowledgements; References; 3 Atomic Wires on Ge(001):H Surface; Abstract; 1 Introduction; 2 Surface Preparation and Experimental Methods; 3 Calculation Methods 
505 8 |a 4 General Properties of Ge(001) Surface: Fermi Level Pinning5 Construction of Dangling Bond Wires on Ge(100):H Surface; 6 Electronic Properties of Short DB Wires; 7 Excitations of Short DB Wires: Electron-Phonon Interaction; 8 Conclusions and Perspectives; Acknowledgements; References; 4 Si(100):H and Ge(100):H Dimer Rows Contrast Inversion in Low-temperature Scanning Tunneling Microscope Images; Abstract; 1 Introduction; 2 Experimental and Calculation Details; 3 Contrast Inversion of the Si(100):H Surface; 4 Contrast Inversion for the Ge(100):H Surface; 5 Conclusions; Acknowledgements 
505 8 |a 7 Electronic Properties of a Single Dangling Bond and of Dangling Bond Wires on a Si(001):H SurfaceAbstract; 1 Introduction; 2 Single DB on a Si(001):H Surface; 3 DB Lines Created on a Si(001):H Surface; 4 Conclusions; Acknowledgements; References; 8 Quantum Hamiltonian Computing (QHC) Logic Gates; Abstract; 1 Introduction; 2 The Mathematics of a Quantum Hamiltonian Computing Boolean Logic Gate; 3 The Universal Two-Inputs-One-Output QHC Logic Gate; 4 Construction of Surface QHC Atomic Logic Gates 
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